#include "Target/AMDGPU/AMDGPUTargetMachine.h"
Public Member Functions | |
| AMDGPUPassConfig (TargetMachine &TM, PassManagerBase &PM) | |
| AMDGPUTargetMachine & | getAMDGPUTargetMachine () const |
| void | addEarlyCSEOrGVNPass () |
| void | addStraightLineScalarOptimizationPasses () |
| void | addIRPasses () override |
| Add common target configurable passes that perform LLVM IR to IR transforms following machine independent optimization. | |
| void | addCodeGenPrepare () override |
| Add pass to prepare the LLVM IR for code generation. | |
| bool | addPreISel () override |
| Methods with trivial inline returns are convenient points in the common codegen pass pipeline where targets may insert passes. | |
| bool | addInstSelector () override |
| addInstSelector - This method should install an instruction selector pass, which converts from LLVM code to machine instructions. | |
| bool | addGCPasses () override |
| addGCPasses - Add late codegen passes that analyze code for garbage collection. | |
| std::unique_ptr< CSEConfigBase > | getCSEConfig () const override |
| Returns the CSEConfig object to use for the current optimization level. | |
| bool | isPassEnabled (const cl::opt< bool > &Opt, CodeGenOptLevel Level=CodeGenOptLevel::Default) const |
Check if a pass is enabled given Opt option. | |
| Public Member Functions inherited from llvm::TargetPassConfig | |
| TargetPassConfig (TargetMachine &TM, PassManagerBase &PM) | |
| TargetPassConfig () | |
| ~TargetPassConfig () override | |
| template<typename TMC> | |
| TMC & | getTM () const |
| Get the right type of TargetMachine for this target. | |
| void | setInitialized () |
| CodeGenOptLevel | getOptLevel () const |
| void | setDisableVerify (bool Disable) |
| bool | getEnableTailMerge () const |
| void | setEnableTailMerge (bool Enable) |
| bool | getEnableSinkAndFold () const |
| void | setEnableSinkAndFold (bool Enable) |
| bool | requiresCodeGenSCCOrder () const |
| void | setRequiresCodeGenSCCOrder (bool Enable=true) |
| void | substitutePass (AnalysisID StandardID, IdentifyingPassPtr TargetID) |
| Allow the target to override a specific pass without overriding the pass pipeline. | |
| void | insertPass (AnalysisID TargetPassID, IdentifyingPassPtr InsertedPassID) |
| Insert InsertedPassID pass after TargetPassID pass. | |
| void | enablePass (AnalysisID PassID) |
| Allow the target to enable a specific standard pass by default. | |
| void | disablePass (AnalysisID PassID) |
| Allow the target to disable a specific standard pass by default. | |
| IdentifyingPassPtr | getPassSubstitution (AnalysisID StandardID) const |
| Return the pass substituted for StandardID by the target. | |
| bool | isPassSubstitutedOrOverridden (AnalysisID ID) const |
| Return true if the pass has been substituted by the target or overridden on the command line. | |
| bool | getOptimizeRegAlloc () const |
| Return true if the optimized regalloc pipeline is enabled. | |
| bool | usingDefaultRegAlloc () const |
| Return true if the default global register allocator is in use and has not be overriden on the command line with '-regalloc=...'. | |
| bool | addISelPasses () |
| High level function that adds all passes necessary to go from llvm IR representation to the MI representation. | |
| void | addPassesToHandleExceptions () |
| Add passes to lower exception handling for the code generator. | |
| virtual void | addISelPrepare () |
| Add common passes that perform LLVM IR to IR transforms in preparation for instruction selection. | |
| virtual bool | addIRTranslator () |
| This method should install an IR translator pass, which converts from LLVM code to machine instructions with possibly generic opcodes. | |
| virtual void | addPreLegalizeMachineIR () |
| This method may be implemented by targets that want to run passes immediately before legalization. | |
| virtual bool | addLegalizeMachineIR () |
| This method should install a legalize pass, which converts the instruction sequence into one that can be selected by the target. | |
| virtual void | addPreRegBankSelect () |
| This method may be implemented by targets that want to run passes immediately before the register bank selection. | |
| virtual bool | addRegBankSelect () |
| This method should install a register bank selector pass, which assigns register banks to virtual registers without a register class or register banks. | |
| virtual void | addPreGlobalInstructionSelect () |
| This method may be implemented by targets that want to run passes immediately before the (global) instruction selection. | |
| virtual bool | addGlobalInstructionSelect () |
| This method should install a (global) instruction selector pass, which converts possibly generic instructions to fully target-specific instructions, thereby constraining all generic virtual registers to register classes. | |
| virtual void | addMachinePasses () |
| Add the complete, standard set of LLVM CodeGen passes. | |
| void | printAndVerify (const std::string &Banner) |
| printAndVerify - Add a pass to dump then verify the machine function, if those steps are enabled. | |
| void | addPrintPass (const std::string &Banner) |
| Add a pass to print the machine function if printing is enabled. | |
| void | addVerifyPass (const std::string &Banner) |
| Add a pass to perform basic verification of the machine function if verification is enabled. | |
| void | addDebugifyPass () |
| Add a pass to add synthesized debug info to the MIR. | |
| void | addStripDebugPass () |
| Add a pass to remove debug info from the MIR. | |
| void | addCheckDebugPass () |
| Add a pass to check synthesized debug info for MIR. | |
| void | addMachinePrePasses (bool AllowDebugify=true) |
| Add standard passes before a pass that's about to be added. | |
| void | addMachinePostPasses (const std::string &Banner) |
| Add standard passes after a pass that has just been added. | |
| bool | isGlobalISelAbortEnabled () const |
| Check whether or not GlobalISel should abort on error. | |
| virtual bool | reportDiagnosticWhenGlobalISelFallback () const |
| Check whether or not a diagnostic should be emitted when GlobalISel uses the fallback path. | |
| virtual bool | isGISelCSEEnabled () const |
| Check whether continuous CSE should be enabled in GISel passes. | |
| Public Member Functions inherited from llvm::ImmutablePass | |
| ImmutablePass (char &pid) | |
| ~ImmutablePass () override | |
| virtual void | initializePass () |
| initializePass - This method may be overriden by immutable passes to allow them to perform various initialization actions they require. | |
| ImmutablePass * | getAsImmutablePass () override |
| bool | runOnModule (Module &) override |
| ImmutablePasses are never run. | |
| Public Member Functions inherited from llvm::ModulePass | |
| ModulePass (char &pid) | |
| ~ModulePass () override | |
| Pass * | createPrinterPass (raw_ostream &OS, const std::string &Banner) const override |
| createPrinterPass - Get a module printer pass. | |
| void | assignPassManager (PMStack &PMS, PassManagerType T) override |
| Find appropriate Module Pass Manager in the PM Stack and add self into that manager. | |
| PassManagerType | getPotentialPassManagerType () const override |
| Return what kind of Pass Manager can manage this pass. | |
| Public Member Functions inherited from llvm::Pass | |
| Pass (PassKind K, char &pid) | |
| Pass (const Pass &)=delete | |
| Pass & | operator= (const Pass &)=delete |
| virtual | ~Pass () |
| PassKind | getPassKind () const |
| virtual StringRef | getPassName () const |
| getPassName - Return a nice clean name for a pass. | |
| StringRef | getPassArgument () const |
| Return a nice clean name for a pass corresponding to that used to enable the pass in opt. | |
| AnalysisID | getPassID () const |
| getPassID - Return the PassID number that corresponds to this pass. | |
| virtual bool | doInitialization (Module &) |
| doInitialization - Virtual method overridden by subclasses to do any necessary initialization before any pass is run. | |
| virtual bool | doFinalization (Module &) |
| doFinalization - Virtual method overriden by subclasses to do any necessary clean up after all passes have run. | |
| virtual void | print (raw_ostream &OS, const Module *M) const |
| print - Print out the internal state of the pass. | |
| void | dump () const |
| virtual void | preparePassManager (PMStack &) |
| Check if available pass managers are suitable for this pass or not. | |
| void | setResolver (AnalysisResolver *AR) |
| AnalysisResolver * | getResolver () const |
| virtual void | getAnalysisUsage (AnalysisUsage &) const |
| getAnalysisUsage - This function should be overriden by passes that need analysis information to do their job. | |
| virtual void | releaseMemory () |
| releaseMemory() - This member can be implemented by a pass if it wants to be able to release its memory when it is no longer needed. | |
| virtual PMDataManager * | getAsPMDataManager () |
| virtual void | verifyAnalysis () const |
| verifyAnalysis() - This member can be implemented by a analysis pass to check state of analysis information. | |
| virtual void | dumpPassStructure (unsigned Offset=0) |
| template<typename AnalysisType> | |
| AnalysisType * | getAnalysisIfAvailable () const |
| getAnalysisIfAvailable<AnalysisType>() - Subclasses use this function to get analysis information that might be around, for example to update it. | |
| bool | mustPreserveAnalysisID (char &AID) const |
| mustPreserveAnalysisID - This method serves the same function as getAnalysisIfAvailable, but works if you just have an AnalysisID. | |
| template<typename AnalysisType> | |
| AnalysisType & | getAnalysis () const |
| getAnalysis<AnalysisType>() - This function is used by subclasses to get to the analysis information that they claim to use by overriding the getAnalysisUsage function. | |
| template<typename AnalysisType> | |
| AnalysisType & | getAnalysis (Function &F, bool *Changed=nullptr) |
| getAnalysis<AnalysisType>() - This function is used by subclasses to get to the analysis information that they claim to use by overriding the getAnalysisUsage function. | |
| template<typename AnalysisType> | |
| AnalysisType & | getAnalysisID (AnalysisID PI) const |
| template<typename AnalysisType> | |
| AnalysisType & | getAnalysisID (AnalysisID PI, Function &F, bool *Changed=nullptr) |
Additional Inherited Members | |
| Static Public Member Functions inherited from llvm::TargetPassConfig | |
| static bool | hasLimitedCodeGenPipeline () |
| Returns true if one of the -start-after, -start-before, -stop-after or -stop-before options is set. | |
| static bool | willCompleteCodeGenPipeline () |
| Returns true if none of the -stop-before and -stop-after options is set. | |
| static std::string | getLimitedCodeGenPipelineReason () |
| If hasLimitedCodeGenPipeline is true, this method returns a string with the name of the options that caused this pipeline to be limited. | |
| static Expected< StartStopInfo > | getStartStopInfo (PassInstrumentationCallbacks &PIC) |
| Returns pass name in -stop-before or -stop-after NOTE: New pass manager migration only. | |
| Static Public Member Functions inherited from llvm::Pass | |
| static const PassInfo * | lookupPassInfo (const void *TI) |
| static const PassInfo * | lookupPassInfo (StringRef Arg) |
| static Pass * | createPass (AnalysisID ID) |
| Static Public Attributes inherited from llvm::TargetPassConfig | |
| static char | ID |
| Protected Member Functions inherited from llvm::TargetPassConfig | |
| bool | addCoreISelPasses () |
| Add the actual instruction selection passes. | |
| void | setOpt (bool &Opt, bool Val) |
| bool | isCustomizedRegAlloc () |
| Return true if register allocator is specified by -regalloc=override. | |
| virtual void | addMachineSSAOptimization () |
| addMachineSSAOptimization - Add standard passes that optimize machine instructions in SSA form. | |
| virtual bool | addILPOpts () |
| Add passes that optimize instruction level parallelism for out-of-order targets. | |
| virtual void | addPreRegAlloc () |
| This method may be implemented by targets that want to run passes immediately before register allocation. | |
| virtual FunctionPass * | createTargetRegisterAllocator (bool Optimized) |
| createTargetRegisterAllocator - Create the register allocator pass for this target at the current optimization level. | |
| virtual void | addFastRegAlloc () |
| addFastRegAlloc - Add the minimum set of target-independent passes that are required for fast register allocation. | |
| virtual void | addOptimizedRegAlloc () |
| addOptimizedRegAlloc - Add passes related to register allocation. | |
| virtual bool | addPreRewrite () |
| addPreRewrite - Add passes to the optimized register allocation pipeline after register allocation is complete, but before virtual registers are rewritten to physical registers. | |
| virtual bool | addPostFastRegAllocRewrite () |
| addPostFastRegAllocRewrite - Add passes to the optimized register allocation pipeline after fast register allocation is complete. | |
| virtual void | addPostRewrite () |
| Add passes to be run immediately after virtual registers are rewritten to physical registers. | |
| virtual void | addPostRegAlloc () |
| This method may be implemented by targets that want to run passes after register allocation pass pipeline but before prolog-epilog insertion. | |
| virtual void | addMachineLateOptimization () |
| Add passes that optimize machine instructions after register allocation. | |
| virtual void | addPreSched2 () |
| This method may be implemented by targets that want to run passes after prolog-epilog insertion and before the second instruction scheduling pass. | |
| virtual void | addBlockPlacement () |
| Add standard basic block placement passes. | |
| virtual void | addPreEmitPass () |
| This pass may be implemented by targets that want to run passes immediately before machine code is emitted. | |
| virtual void | addPostBBSections () |
| This pass may be implemented by targets that want to run passes immediately after basic block sections are assigned. | |
| virtual void | addPreEmitPass2 () |
| Targets may add passes immediately before machine code is emitted in this callback. | |
| AnalysisID | addPass (AnalysisID PassID) |
| Utilities for targets to add passes to the pass manager. | |
| void | addPass (Pass *P) |
| Add a pass to the PassManager if that pass is supposed to be run, as determined by the StartAfter and StopAfter options. | |
| virtual FunctionPass * | createRegAllocPass (bool Optimized) |
| addMachinePasses helper to create the target-selected or overriden regalloc pass. | |
| virtual bool | addRegAssignAndRewriteFast () |
| Add core register allocator passes which do the actual register assignment and rewriting. | |
| virtual bool | addRegAssignAndRewriteOptimized () |
| Protected Member Functions inherited from llvm::ModulePass | |
| bool | skipModule (const Module &M) const |
| Optional passes call this function to check whether the pass should be skipped. | |
| Protected Attributes inherited from llvm::TargetPassConfig | |
| TargetMachine * | TM |
| PassConfigImpl * | Impl = nullptr |
| bool | Initialized = false |
| bool | DisableVerify = false |
| bool | EnableTailMerge = true |
| Default setting for -enable-tail-merge on this target. | |
| bool | EnableSinkAndFold = false |
| Enable sinking of instructions in MachineSink where a computation can be folded into the addressing mode of a memory load/store instruction or replace a copy. | |
| bool | RequireCodeGenSCCOrder = false |
| Require processing of functions such that callees are generated before callers. | |
| bool | EnableLoopTermFold = false |
| Enable LoopTermFold immediately after LSR. | |
Detailed Description
Definition at line 129 of file AMDGPUTargetMachine.h.
Constructor & Destructor Documentation
◆ AMDGPUPassConfig()
| AMDGPUPassConfig::AMDGPUPassConfig | ( | TargetMachine & | TM, |
| PassManagerBase & | PM ) |
Definition at line 1264 of file AMDGPUTargetMachine.cpp.
References llvm::TargetPassConfig::disablePass(), llvm::FuncletLayoutID, llvm::GCLoweringID, llvm::ShadowStackGCLoweringID, llvm::StackMapLivenessID, llvm::TargetPassConfig::TargetPassConfig(), and llvm::TargetPassConfig::TM.
Member Function Documentation
◆ addCodeGenPrepare()
|
overridevirtual |
Add pass to prepare the LLVM IR for code generation.
This should be done before exception handling preparation passes.
Reimplemented from llvm::TargetPassConfig.
Definition at line 1398 of file AMDGPUTargetMachine.cpp.
References llvm::TargetPassConfig::addCodeGenPrepare(), llvm::TargetPassConfig::addPass(), llvm::createAMDGPULowerBufferFatPointersPass(), llvm::createAMDGPULowerIntrinsicsLegacyPass(), llvm::createAMDGPULowerKernelArgumentsPass(), llvm::createAMDGPUPreloadKernelArgumentsLegacyPass(), llvm::createLoadStoreVectorizerPass(), llvm::createLowerSwitchPass(), EnableLoadStoreVectorizer, EnableLowerKernelArguments, isPassEnabled(), llvm::None, and llvm::TargetPassConfig::TM.
◆ addEarlyCSEOrGVNPass()
| void AMDGPUPassConfig::addEarlyCSEOrGVNPass | ( | ) |
Definition at line 1275 of file AMDGPUTargetMachine.cpp.
References llvm::TargetPassConfig::addPass(), llvm::Aggressive, llvm::createEarlyCSEPass(), llvm::createGVNPass(), and llvm::TargetPassConfig::getOptLevel().
Referenced by addIRPasses(), and addStraightLineScalarOptimizationPasses().
◆ addGCPasses()
|
overridevirtual |
addGCPasses - Add late codegen passes that analyze code for garbage collection.
Add standard GC passes.
This should return true if GC info should be printed after these passes.
Reimplemented from llvm::TargetPassConfig.
Definition at line 1444 of file AMDGPUTargetMachine.cpp.
◆ addInstSelector()
|
overridevirtual |
addInstSelector - This method should install an instruction selector pass, which converts from LLVM code to machine instructions.
Reimplemented from llvm::TargetPassConfig.
Definition at line 1439 of file AMDGPUTargetMachine.cpp.
References llvm::TargetPassConfig::addPass(), llvm::createAMDGPUISelDag(), getAMDGPUTargetMachine(), and llvm::TargetPassConfig::getOptLevel().
◆ addIRPasses()
|
overridevirtual |
Add common target configurable passes that perform LLVM IR to IR transforms following machine independent optimization.
Reimplemented from llvm::TargetPassConfig.
Definition at line 1299 of file AMDGPUTargetMachine.cpp.
References llvm::AAResults::addAAResult(), addEarlyCSEOrGVNPass(), llvm::TargetPassConfig::addIRPasses(), llvm::TargetPassConfig::addPass(), addStraightLineScalarOptimizationPasses(), AMDGPUAtomicOptimizerStrategy, llvm::createAlwaysInlinerLegacyPass(), llvm::createAMDGPUAAWrapperPass(), llvm::createAMDGPUAlwaysInlinePass(), llvm::createAMDGPUAtomicOptimizerPass(), llvm::createAMDGPUCodeGenPreparePass(), llvm::createAMDGPUCtorDtorLoweringLegacyPass(), llvm::createAMDGPUExportKernelRuntimeHandlesLegacyPass(), llvm::createAMDGPUImageIntrinsicOptimizerPass(), llvm::createAMDGPULowerModuleLDSLegacyPass(), llvm::createAMDGPUPrintfRuntimeBinding(), llvm::createAMDGPUPromoteAlloca(), llvm::createAMDGPURemoveIncompatibleFunctionsPass(), llvm::createAMDGPUSwLowerLDSLegacyPass(), llvm::createAMDGPUUniformIntrinsicCombineLegacyPass(), llvm::createAtomicExpandLegacyPass(), llvm::createExpandVariadicsPass(), llvm::createExternalAAWrapperPass(), llvm::createLICMPass(), llvm::createR600OpenCLImageTypeLoweringPass(), llvm::TargetPassConfig::disablePass(), EnableAMDGPUAliasAnalysis, EnableImageIntrinsicOptimizer, EnableLowerModuleLDS, EnableScalarIRPasses, EnableSwLowerLDS, EnableUniformIntrinsicCombine, llvm::FuncletLayoutID, getAMDGPUTargetMachine(), isPassEnabled(), llvm::Less, LowerCtorDtor, llvm::Lowering, llvm::None, P, llvm::PatchableFunctionID, llvm::Triple::r600, RemoveIncompatibleFunctions, llvm::StackMapLivenessID, and llvm::TargetPassConfig::TM.
◆ addPreISel()
|
overridevirtual |
Methods with trivial inline returns are convenient points in the common codegen pass pipeline where targets may insert passes.
Methods with out-of-line standard implementations are major CodeGen stages called by addMachinePasses. Some targets may override major stages when inserting passes is insufficient, but maintaining overriden stages is more work. addPreISelPasses - This method should add any "last minute" LLVM->LLVM passes (which are run just before instruction selector).
Reimplemented from llvm::TargetPassConfig.
Definition at line 1433 of file AMDGPUTargetMachine.cpp.
References llvm::TargetPassConfig::addPass(), llvm::createFlattenCFGPass(), llvm::None, and llvm::TargetPassConfig::TM.
◆ addStraightLineScalarOptimizationPasses()
| void AMDGPUPassConfig::addStraightLineScalarOptimizationPasses | ( | ) |
Definition at line 1282 of file AMDGPUTargetMachine.cpp.
References addEarlyCSEOrGVNPass(), llvm::TargetPassConfig::addPass(), llvm::Aggressive, llvm::createEarlyCSEPass(), llvm::createLoopDataPrefetchPass(), llvm::createNaryReassociatePass(), llvm::createSeparateConstOffsetFromGEPPass(), llvm::createStraightLineStrengthReducePass(), EnableLoopPrefetch, and isPassEnabled().
Referenced by addIRPasses().
◆ getAMDGPUTargetMachine()
|
inline |
Definition at line 133 of file AMDGPUTargetMachine.h.
References llvm::TargetPassConfig::getTM().
Referenced by addInstSelector(), and addIRPasses().
◆ getCSEConfig()
|
overridevirtual |
Returns the CSEConfig object to use for the current optimization level.
Reimplemented from llvm::TargetPassConfig.
Definition at line 1211 of file AMDGPUTargetMachine.cpp.
References llvm::getStandardCSEConfigForOpt(), and llvm::TargetPassConfig::TM.
◆ isPassEnabled()
|
inline |
Check if a pass is enabled given Opt option.
The option always overrides defaults if explicitly used. Otherwise its default will be used given that a pass shall work at an optimization Level minimum.
Definition at line 150 of file AMDGPUTargetMachine.h.
References llvm::Default, llvm::cl::Option::getNumOccurrences(), and llvm::TargetPassConfig::TM.
Referenced by addCodeGenPrepare(), addIRPasses(), and addStraightLineScalarOptimizationPasses().
The documentation for this class was generated from the following files:
- lib/Target/AMDGPU/AMDGPUTargetMachine.h
- lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
Generated on for LLVM by